PADS Design Engineer

DTS is looking for highly skilled and experienced Mentor PADS PCB designers to join our Singapore team.

Job Description:
Designing Printed Circuit Board layouts for Semiconductor Test applications utilizing Cadence Allegro software.

Primary Responsibilities:

  • Produce PCB layouts for medium to complex (mixed signal, RF and high-speed) designs.
  • Generate manufacturing files and produce supporting documentation for these designs, including gerber, fabrication, and assembly drawings.
  • Develop and maintain a component database, including schematic symbol library and footprint library.
  • Working directly with applications and local engineers, completing all aspects of ATE PCB development process.

Experience Requirements:

  • Minimum of 3 to 5 years layout expertise with the Cadence Allegro 16.2/16.3/16.5 design platform is a must.
  • Minimum of 3-5 years experience with PADS PowerLogic
  • Solid and working knowledge of the constraints manager and design for manufacturability.
  • Previous design experience for ATE applications, on Teradyne, Verigy and Advantest and other ATE Platforms is a must.
  • Candidates should have a thorough understanding of Multilayer High speed PCB design.
  • Must possess a good electrical knowledge and experience with high speed, RF and power design.
  • Strong knowledge of component placement in relation to ATE Tester for best performance.
  • Must be highly motivated independent individual who is detail and team oriented.
  • Must be able to multi-task for time critical design schedules.
  • Must understand the PCB fabrication process, and design for manufacturability.
Apply

Allegro Design Engineer

DTS is looking for highly skilled and experienced Mentor PADS PCB designers to join our Singapore team.

Job Description:
Designing Printed Circuit Board layouts for Semiconductor Test applications utilizing Cadence Allegro software.

Primary Responsibilities:

  • Produce PCB layouts for medium to complex (mixed signal, RF and high-speed) designs.
  • Generate manufacturing files and produce supporting documentation for these designs, including gerber, fabrication, and assembly drawings.
  • Develop and maintain a component database, including schematic symbol library and footprint library.
  • Working directly with applications and local engineers, completing all aspects of ATE PCB development process.

Experience Requirements:

  • Minimum of 3 to 5 years layout expertise with the Cadence Allegro 16.2/16.3/16.5 design platform is a must.
  • Minimum of 3-5 years experience with CONCEPT HDL
  • Solid and working knowledge of the constraints manager and design for manufacturability.
  • Previous design experience for ATE applications, on Teradyne, Verigy and Advantest and other ATE Platforms is a must.
  • Candidates should have a thorough understanding of Multilayer High speed PCB design.
  • Must possess a good electrical knowledge and experience with high speed, RF and power design.
  • Strong knowledge of component placement in relation to ATE Tester for best performance.
  • Must be highly motivated independent individual who is detail and team oriented.
  • Must be able to multi-task for time critical design schedules.
  • Must understand the PCB fabrication process, and design for manufacturability.
Apply